Objectives:
To construct J-K Flipflop, R-S Flipflop using NAND gates, Delay (D type) flip flop, T flip flop and to verify their respective
truth tables.
Specifications:
Built in fixed power supply +5V @ 250mA.
JK flip flops, RS flip flops each four individually.
Clock output with 1Hz and 10Hz frequency with switch selectable.
Pulser output, decoder using 7447 provided.
Low and high points using SPDT switches are provided as inputs
LED's are provided as outputs.